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MCM6265CJ15资料

2023-06-26 来源:飒榕旅游知识分享网
元器件交易网www.cecb2b.com

MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

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by MCM6265C/D

8K x 9 Bit Fast Static RAM

The MCM6265C is fabricated using Motorola’s high–performance silicon–gateCMOS technology. Static design eliminates the need for external clocks or timingstrobes, while CMOS circuitry reduces power consumption and provides forgreater reliability.This device meets JEDEC standards for functionality and pinout, and is avail-able in plastic dual–in–line and plastic small–outline J–leaded packages.Single 5 V ±󰀀10% Power SupplyFully Static—No Clock or Timing Strobes NecessaryFast Access Times: 12, 15, 20, 25, and 35 nsEqual Address and Chip Enable Access TimesOutput Enable (G)Feature for Increased System Flexibility and toEliminate Bus Contention Problems•Low Power Operation: 110– 150 mA Maximum AC•Fully TTL Compatible—Three State Output•••••

MCM6265C

P PACKAGE300 MIL PLASTICCASE 710B–01J PACKAGE300 MIL SOJCASE 810B–03PIN ASSIGNMENTA8A7A612345678910111213142827262524232221201918171615VCCWE2A9A10A11GA12E1DQ8DQ7DQ6DQ5DQ4BLOCK DIAGRAMA2A3A4A5A7A9A10A11DQ0INPUTDATACONTROLDQ8COLUMN I/OCOLUMN DECODERROWDECODERMEMORY MATRIX256 ROWS x 32x 9 COLUMNSVCCVSSA5A4A3A2A1A0DQ0DQ1DQ2DQ3VSSA0A1A6A8A12PIN NAMESA0 – A12. . . . . . . . . . . . . Address InputDQ0 – DQ8. . . Data Input/Data OutputW. . . . . . . . . . . . . . . . . . . . Write EnableG. . . . . . . . . . . . . . . . . . . Output EnableE1, E2. . . . . . . . . . . . . . . . . Chip EnableVCC. . . . . . . . . . . Power Supply (+ 5 V)VSS. . . . . . . . . . . . . . . . . . . . . . . GroundE1E2WGREV 25/95© Motorola, Inc. 1994MOTOROLA FAST SRAMMCM6265C1元器件交易网www.cecb2b.comTRUTH TABLE (X = Don’t Care)E1HXLLLE2XLHHHGXXHLXWXXHHLModeNot SelectedNot SelectedOutput DisabledReadWriteVCC CurrentISB1, ISB2ISB1, ISB2ICCAICCAICCAOutputHigh–ZHigh–ZHigh–ZDoutHigh–ZCycle———Read CycleWrite CycleABSOLUTE MAXIMUM RATINGS (See Note)RatingPower Supply VoltageVoltage Relative to VSS for Any PinExcept VCCOutput CurrentPower DissipationTemperature Under BiasOperating TemperatureStorage Temperature — PlasticSymbolVCCVin, VoutIoutPDTbiasTAValue– 0.5 to + 7.0– 0.5 to VCC + 0.5±󰀀201.0– 10 to + 850 to + 70UnitVVmAW°C°CThis device contains circuitry to protect theinputs against damage due to high static volt-ages or electric fields; however, it is advisedthat normal precautions be taken to avoidapplication of any voltage higher than maxi-mum rated voltages to these high–impedancecircuits.This CMOS memory circuit has been de-signed to meet the dc and ac specificationsshown in the tables, after thermal equilibriumhas been established. The circuit is in a testsocket or mounted on a printed circuit boardand transverse air flow of at least 500 linearfeet per minute is maintained.Tstg– 55 to + 125°CNOTE:Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS areexceeded. Functional operation should be restricted to RECOMMENDED OPER-ATING CONDITIONS. Exposure to higher than recommended voltages forextended periods of time could affect device reliability.DC OPERATING CONDITIONS AND CHARACTERISTICS(VCC = 5.0 V ±󰀀10%, TA = 0 to +70°C, Unless Otherwise Noted)RECOMMENDED OPERATING CONDITIONSParameterSupply Voltage (Operating Voltage Range)Input High VoltageInput Low Voltage*VIL (min) = – 0.5 V dc; VIL (min) = – 2.0 V ac (pulse width ≤ 20 ns)**VIH (max) = VCC + 0.3 V dc; VIH (max) = VCC + 2 V ac (pulse width ≤ 20 ns)SymbolVCCVIHVILMin4.52.2– 0.5*Typ5.0——Max5.5VCC + 0.3**0.8UnitVVVDC CHARACTERISTICSParameterInput Leakage Current (All Inputs, Vin = 0 to VCC)Output Leakage Current (E1 = VIH, E2 = VIL, or G = VIH, Vout = 0 to VCC)Output Low Voltage (IOL = 8.0 mA)Output High Voltage (IOH = –4.0 mA)SymbolIlkg(I)Ilkg(O)VOLVOHMin———2.4Max± 1± 10.4—UnitµAµAVVPOWER SUPPLY CURRENTSParameterAC Active Supply Current (Iout = 0 mA, VCC = Max, f = fmax)AC Standby Current (E1 = VIH or E2 = VIL, VCC = Max, f = fmax)Standby Current (E1 ≥ VCC – 0.2 V or E2 ≤ VSS + 0.2 V,Vin ≤󰀀VSS + 0.2 V or ≥ VCC – 0.2 V)SymbolICCAISB1ISB2–121504520–151404020–201303520–251203020–351103020UnitmAmAmACAPACITANCE (f = 1 MHz, dV = 3 V, TA = 25°C, Periodically Sampled Rather Than 100% Tested)ParameterAddress Input CapacitanceControl Pin Input Capacitance (E1, E2, G, W)I/O CapacitanceSymbolCinCinCI/OMax667UnitpFpFpFMCM6265C2MOTOROLA FAST SRAM元器件交易网www.cecb2b.comAC OPERATING CONDITIONS AND CHARACTERISTICS(VCC = 5.0 V ±󰀀10%, TA = 0 to + 70°C, Unless Otherwise Noted)Input Timing Measurement Reference Level. . . . . . . . . . . . . . . 1.5 VInput Pulse Levels. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to 3.0 VInput Rise/Fall Time. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 nsOutput Timing Measurement Reference Level. . . . . . . . . . . . . 1.5 VOutput Load. . . . . . . . . . . . See Figure 1A Unless Otherwise NotedREAD CYCLE (See Notes 1 and 2)–12ParameterRead Cycle TimeAddress Access TimeEnable Access TimeOutput Enable Access TimeOutput Hold from Address ChangeEnable Low to Output ActiveEnable High to Output High–ZOutput Enable Low to Output ActiveOutput Enable High to Output High–ZPower Up TimePower Down TimeSymboltAVAVtAVQVtELQVtGLQVtAXQXtELQXtEHQZtGLQXtGHQZtELICCHtEHICCLMin12———440000—Max—12126——6—6—12–15Min15———440000—Max—15158——8—7—15–20Min20———440000—Max—202010——9—8—20–25Min25———440000—Max—252511——10—9—25–35Min35———440000—Max—353512——11—10—35Unitnsnsnsnsnsnsnsnsnsnsns5,6,75,6,75,6,75,6,74Notes3NOTES:1.W is high for read cycle.2.E1 and E2 are represented by E in this data sheet. E2 is of opposite polarity to E.3.All timings are referenced from the last valid address to the first transitioning address.4.Addresses valid prior to or coincident with E going low.5.At any given voltage and temperature, tEHQZ (max) is less than tELQX (min), and tGHQZ (max) is less than tGLQX (min), both for a given device and from device to device.6.Transition is measured ± 500 mV from steady–state voltage with load of Figure 1B.7.This parameter is sampled and not 100% tested.8.Device is continuously selected (E1 = VIL, E2 = VIH, G = VIL).AC TEST LOADS+ 5 VOUTPUTZ0 = 50 Ω50 ΩVL = 1.5 VOUTPUT255 Ω5 pF480 ΩTIMING LIMITSThe table of timing values shows eithera minimum or a maximum limit for each pa-rameter. Input requirements are specifiedfrom the external system point of view.Thus, address setup time is shown as aminimum since the system must supply atleast that much time (even though mostdevices do not require it). On the otherhand, responses from the memory arespecified from the device point of view.Thus, the access time is shown as a maxi-mum since the device never provides datalater than that time.Figure 1AFigure 1BMOTOROLA FAST SRAMMCM6265C3元器件交易网www.cecb2b.comREAD CYCLE 1 (See Note 8)tAVAVA (ADDRESS)tAXQXQ (DATA OUT)PREVIOUS DATA VALIDtAVQVDATA VALIDREAD CYCLE 2 (See Note 4)tAVAVA (ADDRESS)tAVQVtELQVE (CHIP ENABLE)tEHQZtELQXG (OUTPUT ENABLE)tGLQVtGLQXQ (DATA OUT)HIGH–ZDATA VALIDtEHICCLHIGH–ZtGHQZVCCICCSUPPLYCURRENTISBtELICCHMCM6265C4MOTOROLA FAST SRAM元器件交易网www.cecb2b.comWRITE CYCLE 1 (W Controlled, See Notes 1, 2, and 3)–12ParameterWrite Cycle TimeAddress Setup TimeAddress Valid to End of WriteWrite Pulse WidthWrite Pulse Width, G HighData Valid to End of WriteData Hold TimeWrite Low to Output High–ZWrite High to Output ActiveWrite Recovery TimeSymboltAVAVtAVWLtAVWHtWLWH,tWLEHtWLWH,tWLEHtDVWHtWHDXtWLQZtWHQXtWHAXMin1201010860040Max———————6——–15Min15012121070040Max———————7——–20Min20015151280040Max———————8——–25Min250171715100040Max———————10——–35Min350202017120040Max———————12——Unitnsnsnsnsnsnsnsnsnsns6, 7, 86, 7, 85Notes4NOTES:1.A write occurs during the overlap of E low and W low.2.E1 and E2 are represented by E in this data sheet. E2 is of opposite polarity to E.3.If G goes low coincident with or after W goes low, the output will remain in a high impedance state.4.All timings are referenced from the last valid address to the first transitioning address.5.If G ≥ VIH, the output will remain in a high impedance state.6.At any given voltage and temperature, tWLQZ (max) is less than tWHQX (min), both for a given device and from device to device.7.Transition is measured ±500 mV from steady–state voltage with load of Figure 1B.8.This parameter is sampled and not 100% tested.WRITE CYCLE 1 (W Controlled, See Notes 1, 2, and 3)tAVAVA (ADDRESS)tAVWHE (CHIP ENABLE)tWLWHtWLEHW (WRITE ENABLE)tAVWLD (DATA IN)tWLQZQ (DATA OUT)HIGH–ZHIGH–ZtDVWH DATA VALIDtWHQXtWHDXtWHAXMOTOROLA FAST SRAMMCM6265C5元器件交易网www.cecb2b.comWRITE CYCLE 2 (E Controlled, See Notes 1 and 2)–12ParameterWrite Cycle TimeAddress Setup TimeAddress Valid to End of WriteEnable to End of WriteWrite Pulse WidthData Valid to End of WriteData Hold TimeWrite Recovery TimeSymboltAVAVtAVELtAVEHtELEH,tELWHtWLEHtDVEHtEHDXtEHAXMin120121010700Max————————–15Min150121012700Max————————–20Min200151215800Max————————–25Min2502015171000Max————————–35Min3502525201500Max————————Unitnsnsnsnsnsnsnsns4, 5Notes3NOTES:1.A write occurs during the overlap of E low and W low.2.E1 and E2 are represented by E in this data sheet. E2 is of opposite polarity to E.3.All timings are referenced from the last valid address to the first transitioning address.4.If E goes low coincident with or after W goes low, the output will remain in a high impedance state.5.If E goes high coincident with or before W goes high, the output will remain in a high impedance state.WRITE CYCLE 2 (E Controlled, See Notes 1 and 2)tAVAVA (ADDRESS)tAVEHE (CHIP ENABLE)tAVELtWLEHW (WRITE ENABLE)tDVEHD (DATA IN) DATA VALIDtEHDXtELEHtELWHtEHAXQ (DATA OUT)HIGH–ZMCM6265C6MOTOROLA FAST SRAM元器件交易网www.cecb2b.comPACKAGE DIMENSIONS28 LEAD300 MIL PDIPCASE 710B–01-A-NOTES:1.DIMENSIONING AND TOLERANCING PER ANSIY14.5M, 1982.2.CONTROLLING DIMENSION: INCH.3.DIMENSION L TO CENTER OF LEAD WHENFORMED PARALLEL.4.DIMENSION A AND B DOES NOT INCLUDE MOLDFLASH. MAXIMUM MOLD FLASH 0.25 (0.010).DIMABCDEFGJKLMNSMILLIMETERSMINMAX34.5534.797.127.623.814.570.390.531.27 BSC1.151.392.54 BSC0.210.303.183.427.62 BSC0°15°0.511.01INCHESMINMAX1.3601.3700.2800.3000.1500.1800.0150.0210.050 BSC0.0450.0550.100 BSC0.0080.0120.1250.1350.300 BSC0°15°0.0200.04028115-B-14LC-T-SEATINGPLANEKFD 28 PL0.25 (0.010)MEGSNMJ 28 PL0.25 (0.010)MTATB28 LEAD300 MIL SOJCASE 810B–03NOTES:1.DIMENSIONING AND TOLERANCING PER ANSIY14.5M, 1982.2.DIMENSION A & B DO NOT INCLUDE MOLDPROTRUSION. MOLD PROTRUSION SHALL NOTEXCEED 0.15 (0.006) PER SIDE.3.CONTROLLING DIMENSION: INCH.4.DIM R TO BE DETERMINED AT DATUM -T-.5.810B-01 AND -02 OBSOLETE, NEW STANDARD810B-03.SDIMABCDEFGHKLMNPRSMILLIMETERSMINMAX18.2918.547.747.503.753.260.500.392.482.240.810.671.27 BSC0.50— 1.140.890.64 BSC0°10°1.140.768.648.386.866.601.010.77INCHESMINMAX0.7200.7300.2950.3050.1280.1480.0150.0200.0880.0980.0260.0320.050 BSC— 0.0200.0350.0450.025 BSC0°10°0.0300.0450.3300.3400.2600.2700.0300.040FDETAIL Z2815ND 24 PL0.18 (0.007)M114TAS-A-LGH BRK0.18 (0.007)P-B-MTBSME0.10 (0.004)KDETAIL Z-T-SEATING PLANECR0.25 (0.010)SS RADTBSMOTOROLA FAST SRAMMCM6265C7元器件交易网www.cecb2b.comORDERING INFORMATION(Order by Full Part Number)MCMMotorola Memory PrefixPart Number6265CXXXXXShipping Method (R2 = Tape and Reel, Blank = Rails)Speed (12 = 12 ns, 15 = 15 ns, 20 = 20 ns,25 = 25 ns, 35 = 35 ns)Package (P = 300 mil Plastic DIP, J = 300 mil SOJ)Full Part Numbers —MCM6265CP12MCM6265CP15MCM6265CP20MCM6265CP25MCM6265CP35MCM6265CJ12MCM6265CJ15MCM6265CJ20MCM6265CJ25MCM6265CJ35MCM6265CJ12R2MCM6265CJ15R2MCM6265CJ20R2MCM6265CJ25R2MCM6265CJ35R2Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regardingthe suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit,and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters can and do vary in differentapplications. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola doesnot convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components insystems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure ofthe Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any suchunintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmlessagainst all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or deathassociated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part.Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer.MCM6265C8◊CODELINE TO BE PLACED HEREMOTOROLA FAST SRAM

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