专利名称：Pre-Biased Circuit for Synchronous Rectified
Power Converters
发明人：Mikael Appelberg申请号：US12094840申请日：20060706
公开号：US20100060253A1公开日：20100311
专利附图：
摘要：The present invention relates to voltage converters and especially to a controlcircuit with an input from the voltage converter output and arranged to control thevoltage level on the voltage converter output. The problem addressed relates to the
situation when there is a pre-bias voltage on the converter output at the moment it isswitched on. The object of the control circuit is to increase the voltage on the converteroutput fast and avoiding any drain of voltage or current from the output at the start upsequence. This is performed by a comparator in the control circuit that is arranged tocompare the reference voltage with a division of the output voltage and if the referencevoltage is lower that the divided output voltage the reference voltage is increased at thecomparator output. The comparator circuit includes an OP-amplifier.
申请人：Mikael Appelberg
地址：Kalmar SE
国籍：SE
更多信息请下载全文后查看
因篇幅问题不能全部显示，请点此查看更多更全内容