专利名称：Apparatus and method for digital circuit
testing
发明人：Hiromichi Watari申请号：US08/187638申请日：19940126公开号：US05459738A公开日：19951017
摘要：An apparatus and method for digital circuit testing in which latches store asingle command for each assigned node in a circuit to be tested. Buffers are used to drivethe nodes of the circuit being tested in accordance with the drive commands. The outputsfrom the circuit being tested are selectively applied to at least one comparator. Amultiplexor reduces the number of comparators required for accessing the all pertinentnodes of the digital circuit being tested.
申请人：WATARI; HIROMICHI
代理机构：Bromberg & Sunstein
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